1. Field of the Invention
This invention relates to circuitry for the detection of shorts or leaky junctions in programmable read only memories (PROMs).
2. Description of the Prior Art
A programmable read only memory (PROM) is a memory in which information is permanently stored in each memory cell of the memory by a programming process. The programming process is performed by the user after fabrication is complete, in contrast to the programming of ROMS by the manufacturer during the fabrication process.
A short or a leaky junction in a PROM cannot be detected by existing design by the manufacturer prior to shipment. Such a short or leaky junction may cause underprogramming, i.e., one or more memory cells may fail to program when the user attempts to program the PROM. Such a short or leaky junction may also cause overprogramming, i.e., when a programming current is applied to a selected memory cell, one or more different cells may be unintentionally programmed. Because the programmming of such PROMS is generally performed by the end user, the manufacturer may become aware of low yields only when the PROM's are rejected by the user.
FIG. 1 illustrates a typical prior art PROM in which the memory includes a rectangular array x.sub.ij of NPN transistors and associated fuses f.sub.ij connected between word lines W.sub.j and bit lines B.sub.i for i=1, . . . ,N; j=1, . . . M. Prior to programming, each memory cell which includes the transistor x.sub.ij and its associated fuse f.sub.ij stores a logical 0, i.e., the fuse f.sub.ij is not open. A leaky base emitter junction of an NPN transistor or a short between a bit line and a word line may result in a fuse which fails to open when a programming current is attempted to be applied to the fuse. A typical titanium-tungsten (TiW) fuse used in many PROMS requires approximately 3 volts across the fuse in order to produce the approximately 50 milliampere (mA) current required to open the fuse. During normal operation (i.e., reading) of the PROMs the maximum supply voltage, (Vcc), is approximately 5.5 volts, and there is not enough voltage across the fuse to cause the 50 mA of current required to open the fuse.
Accordingly, one of the steps of the programming procedure is to raise the supply voltage Vcc to approximately 12 volts, well above the levels used during reading the PROM. A memory cell to be programmed containing the array transistor x.sub.ij is selected by selecting the word line W.sub.j and the bit line B.sub.i. The selected word line and thus the base of the selected transistor x.sub.ij is at approximately 8 volts, a voltage level determined by internal clamping circuitry (not shown). The remaining deselected word lines are at approximately 1 volt. The base emitter voltage, V.sub.BE, of the selected array transistor x.sub.ij at a base emitter current of 50 mA is approximately 1.5 volts. So, the emitter of the array transistor x.sub.ij, which is connected to one end of its associated fuse f.sub.ij, is at a voltage of approximately 8 volts-1.5 volts=6.5 volts. The programming circuit (not shown) holds the voltage on the selected bit line B.sub.i on the other end of the fuse f.sub.ij at approximately 1.5 volts if the fuse is to open to store a logical one. Therefore, the voltage across the fuse f.sub.ij is approximately 6.5 volts-1.5 volts=5.0 volts which will cause a current greater than 50 mA which will cause the fuse to open, thereby storing a logical one.
Conversely, if the fuse f.sub.ij is not to be opened and the cell is to store a logical zero, the bit line B.sub.i is held to approximately 7 volts, so that the voltage drop across the fuse f.sub.ij is insufficient to cause a current which will cause the fuse to open.
The array transistor x.sub.ij provides to its associated fuse f.sub.ij a programming current of 50 mA by amplifying the base current supplied to it through transistor x.sub.j (the "word driver"). If an emitter-base (EB) junction of an array transistor x.sub.ij to be programmed is shorted or has a sufficiently large leakage current, or if there is a short between its word line W.sub.j and its bit line B.sub.i, the drive current supplied by word driver x.sub.j is not sufficient to provide enough current to cause the fuse to open.
On the other hand, a short between the base of an array transistor and its associated bit line may cause unintentional programming of another cell on the same bit line. For example, suppose there is a short between the base of transistor X.sub.IM (Shown in FIG. 1) and bit line B.sub.1. If word line W.sub.1 is then brought high with the intent of programming transistor x.sub.N1, fuse f.sub.11 may unintentionally be opened by current flowing along the following path: from word line W.sub.1, through the base emitter junction of transistor x.sub.11, through fuse f.sub.11 to bit line B.sub.1, from bit line B.sub.1 through the short between bit line B.sub.1 and the base of transistor x.sub.IM, to decode diode D.sub.m *, and from decode diode D.sub.m * through buffer transistor F.sub.1 to ground. This will cause the undesired programming (opening) of fuse f.sub.11.
Prior art PROMs do not contain circuitry to detect the existence of these shorts and therefore since PROMs are typically programmed by the user, defective unprogrammed units may be shipped to the user. This problem does not arise for read-only-memories (ROMs) since these are typically programmed by a mask pattern as a part of the manufacturing process and hence can be tested by the manufacturer prior to shipment.